U.S. Pat. No. 4,599,246 shows a process for producing a thin film transistor array. The process requires three masking steps instead of the conventional seven. The process of the patent differs from the present invention, however, in that it is not self-aligning and does not involve the use of a dual-tone resist.
An article by Kodama et al in IEEE Electron Device Letters, Vol. EDL-3, #7, July 1982, page 187, shows a self-aligning process for thin film transistors. The process of this publication does not involve the use of a dual-tone resist and it is also obviously different from the process of the present invention.
West German patent application DE No. 3337315 Al discloses the concept of a dual-tone resist. The publication, however, is entirely silent in regard to a process for making a thin film transistor and does not describe a self-aligning process.